1. Field
Embodiments of the invention relate to a semiconductor device capable of detecting and correcting an intermittent fail which occurs in a memory cell, and an operating method thereof.
2. Description of the Related Art
With the increase in integration degree and the reduction in critical dimension (CD) of DRAM, a voltage difference for distinguishing the logical level of a cell has gradually decreased because the capacity of a cell capacitor becomes smaller than a bit line capacitor.
When a cell with a small capacity is connected to a sense amplifier, a one-bit fail is highly likely to occur during the operation of the cell. Such a one-bit fail is referred to as an intermittent tWR fail (hereafter, referred to as an intermittent fail).
The intermittent fail does not continuously occur in a specific cell, but irregularly occurs. Thus, when the cell is repaired, the following problem may occur.
In the case of DRAM, a refresh operation is performed at a predetermined cycle, but an intermittent fail may occur between the refresh cycles. Thus, such a problem cannot be solved through a typical refresh operation.
Therefore, there is a demand for a semiconductor device for correcting an intermittent fail during the operation of a memory cell in order to increase the reliability of the memory cell, and an operating method thereof.